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Basic Amplifier Structure, by Nagendra Krishnapura

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Swing Limit Due to Transistor Entering Triode Region, by Nagendra Krishnapura

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Type II PLL-Extra Poles; Random Noise in a PLL, by Nagendra Krishnapura

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Common Source Amplifier Analysis: Effect of Biasing Components, by Nagendra Krishnapura

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Matrix Inversion Basics, by Nagendra Krishnapura

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Constraints on Large Signal Characteristics to Maximize the Gain, by Nagendra Krishnapura

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Active Load Amplifiers as Digital Gates, by Nagendra Krishnapura

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Fully Differential Two Stage Opamp; Fully Differential Versus Pseudo-Differential, by Nagendra Krishnapura

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Obtaining Power Gain, by Nagendra Krishnapura

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Types of Feedback for Constant Drain Current Bias, by Nagendra Krishnapura

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Differential Pair with Differential Excitation, by Nagendra Krishnapura

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Sensitivity of Output Bias to Input Bias in a CMOS Inverter, by Nagendra Krishnapura

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Examples of more than one Transistor in Feedback, by Nagendra Krishnapura

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Intuitive Explanation of Low Sensitivity with Drain Feedback, by Nagendra Krishnapura

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Linearity of Elements, by Nagendra Krishnapura

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Self Biasing a CMOS Inverter, by Nagendra Krishnapura

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Inductor, by Nagendra Krishnapura

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Bias Current Generation, by Nagendra Krishnapura

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Constraints on Controlled Sources Using Opamps and Transistors, by Nagendra Krishnapura

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VCVS Using a MOS Transistor-Small Signal Picture, by Nagendra Krishnapura

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Summary: Linear Circuit Response to Sinusoidal Input Via the Complex Exponential, by Nagendra Krishnapura

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pMOS Transistor, by Nagendra Krishnapura

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Does a Capacitor Block DC?, by Nagendra Krishnapura

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VCCS Using a MOS Transistor, by Nagendra Krishnapura

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Small Signal Model of a Diode, by Nagendra Krishnapura

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CCCS Using a MOS Transistor, by Nagendra Krishnapura

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Structure of the Conductance Matrix, by Nagendra Krishnapura

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DC Negative Feedback Biasing of all Stages, Cont’d, by Nagendra Krishnapura

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Common Souce Amplifier with Current Mirror Bias, by Nagendra Krishnapura

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Solutions.., by Nagendra Krishnapura

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